Easics offers design services for both digital and mixed-signal chips: system-on-chip, ASIC, ASSP and structured ASIC. Being an independent design services company, easics can provide you with unbiased technology and system architecture advice that perfectly matches your project requirements, budget and schedule.
ASIC design services include:
- digital ASIC design until GDSII: VHDL, SystemC, (System)Verilog / UVM, MyHDL
- DSP, algorithm & model design: Matlab, SystemC, C++, C, Python, Ruby, …
- embedded software design: C
- FPGA development for early prototyping and emulation, and for ASIC prototype measurement setup
- ASIC prototype measurements
- long-term support
Easics works with leading semiconductor wafer manufacturers such as TSMC, GLOBALFOUNDRIES, UMC, SMIC, ST, NXP, TowerJazz, LFoundry, ON Semi, X-FAB, ams and NEC, and can thus leverage this experience for your project. We support a wide range of technology nodes: 0.35μm, 0.25μm, 0.18μm, 0.13μm, 90nm, 65/55nm, 40nm, 28nm, 16nm.
Easics has developed a robust and reuse-friendly design methodology to build First Time Right silicon. It uses a coding style that leverages the benefits of a synthesis-based implementation flow to code at the highest possible abstraction level, thus protecting your investment in a readable and maintainable code database. This methodology is proven by a myriad of successful First Time Right projects for customers such as NXP Semiconductors, Cochlear, Agilent / Keysight, CMOSIS, SoftKinetic, ESA and many others.
Extra care is taken in design areas where technology dependent features are used (such as embedded memory blocks and analog macros). These areas are carefully isolated in the design database, in such a way that transitioning to a different technology can be realized with minimum effort. Easics’ design style and in-house tools also allow to realize FPGA prototypes of sub-systems of your design, if you so desire.
ASIC Project Tasks
Depending on your requirements easics’ system architects and design engineers can help you with the following project tasks:
- Feasibility study.
- Functional requirements assessment.
- System architecture definition.
- Hardware-software trade-offs.
- Third-party IP selection and integration.
- Module level hardware design and verification.
- Processor integration and embedded software design.
- Top level simulation at RTL and gate level.
- Hardware-software co-verification.
- Synthesis from RTL level to gate level.
- Formal verification.
- FPGA prototyping of top-level or sub-level.
- Design for test: boundary scan, internal scan.
- Physical design and verification.
- Static timing analysis (STA).
- Power consumption analysis.
- Sign-off with selected technology partner: foundry, packaging, test.
- Measurements of prototype ICs in the lab.