ASIC design for healthcare wearables
ASIC design for healthcare wearables Help people hear and be heard
Overview
Request for help with ASIC verification and medical certification.
For over 30 years,the customer is the leading global expert in implantable hearing solutions. Unlike hearing aids, which amplify sound, the implant does the work of the damaged parts of the inner ear to directly stimulate the auditory nerve in the brain.
In medical ASIC’s, a big part of the verification and testing of the chip is not about proving standard functionality. The ASIC may never harm a human being even in the most extreme faulty conditions. This means extreme stimuli need to be applied within the test environment. Like in case of a malfunction the ASIC needs to shut down before harming the patient.
| Tags | ASIC, FPGA design, Healtcare |
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Requirements
Our solution
The amount of possible faulty behaviors is too large for the hardware.
Easics proposed a thin layer hardware side with a transparent object-oriented software side. The solution exists of a FPGA based hardware platform between the software and the ASIC that needs to be verified. Thereby we gratefully made use of our in-house developed VCI software tool.
A standard MCU system is not capable to monitor all the different protocols simultaneously
It allows us to describe the FPGA register-map in a high-level C-like language and then generates the corresponding HW address decoding (VHDL or Verilog), software view (C, C++, Python...) and user documentation (docx, asciidoc, LaTeX, xml...).
Results:
A flexible and scalable solution fot better transition which can also be adapted for future design or requirements changes.
Better transition
The software engineer developing the testcases doesn't need to know about all bus signal transitions adding up to one single protocol action. Instead, higher abstraction level data types are foreseen in the register map, like for example a simple struct with address, read-write indication and value to write.
Flexible easics VCI Tool
Note that easics' VCI tool can generate both the object-oriented SW API as the low-level HW code.
Adapt to specification and requirements changes
Additionally it greatly improves the flexibility and adaptability to design specification changes, not only during the initial design but also later when the design needs to be updated to a changing environment or new requirements.
