About us
Vision
Our goal in life
Mission
Easics wants to be a market leader in the embedded systems digital design by providing unique competence and development platforms that lead to first-time right, reliable and optimized logic and software that is maintainable by the customer. Our main target market is to support leading OEMs and semiconductor companies with custom designs and customizable IP blocks for these smart embedded processing systems that can be realized in both FPGAs and ASICs.
Start-up fun in a rock-solid company
happy colleagues and counting!
Management Team

Emiliano D’Agostino (CEO)
Steven Coenen (COO)
Ramses Valvekens is the Managing Director of easics, since the management buy-out in December 2004.
Besides his role as Managing Director, Ramses remains active as a systems architect, focusing on technology selection, project risk reduction and cost-effective mixed-signal ASIC and FPGA design trade-offs. He is a regular speaker at industry conferences and gives lectures in semiconductor system design.
He holds a Master degree (1997) in Electronics Engineering from the Katholieke Universiteit Leuven and a Master degree (1994) in industrial engineering / electronics from Groep T in Leuven, Belgium.
He performed research in signal processing at the Lawrence Livermore National Laboratories (California, USA) and at the Institut National Polytechnique de Grenoble (France).
He has been working at easics since 1997. During the TranSwitch years (2000 till 2004), he was technical manager of a product family of mixed-signal telecom chips. He received the TranSwitch Employee Recognition Award in 2003 and is co-inventor of two telecommunication patents[1][2].
To enable easics’ growth ambition Emiliano D’Agostino joined the MT as managing director & CEO of easics as of April 2021. He is an executive with hands-on experience in the medtech industry. Before joining easics, he has founded DoseVue, a medtech company which he has brought from incorporation up to commercial product launch. He received a PhD in electrical engineering, focused on medical image processing, from the KU Leuven in 2006. He holds master degrees in physics engineering from the Université Libre de Bruxelles and in nuclear engineering from the Politecnico di Milano.
Steven Coenen is the Managing Director of easics, since the management buy-out in December 2004.
He holds a Master degree (1998) in Computer Engineering from the Katholieke Universiteit Leuven, Belgium.
He has been working at easics since 1998 and has developed most of the easics in-house EDA tools to support easics’ design methodology.
He is an all-round hardware/software guru and a vivid GNU/Linux adept.
He is the inventor of a patent[3] on the verification of telecom protocols.
Quality
At easics NV we know that a wrong design or a sub-performing product can cost money, time and credibility. We understand the importance of prompt customer response, quality and on time delivery. easics has achieved customer loyalty by practicing a policy of high quality and working closely with customers to deliver to their exact specifications.
As of april 2022, we can proudly present our ISO 9001 certification.
easics ISO 9001
Chairmain of the Board
Professor André Oosterlinck is Honorary Rector of the Katholieke Universiteit Leuven (KU Leuven) and chairman of the Association KU Leuven, which is Belgium’s largest university. In 1984 he was appointed full professor at KU Leuven in the domain of image and signal processing. From 1984 to 1994 he was director of the division Electronics Systems Automatization and Technology (ESAT). He became vice-president for the exact sciences at KU Leuven in 1990 and was rector and president of the KU Leuven from August 1995 until July 2005. He has also been visiting professor at Utah University (1984) and ARC-IBM, San Jose, USA (1986-1996). He was a co-founder of ICOS Vision Systems (now KLA Tencor). He currently is the vice-chairman of imec and board member or chairman at several high-tech companies.
The other board members are Ramses Valvekens, Emiliano D’Agostino and Steven Coenen. easics is a privately owned company.
Publications
easics
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Affordable AI in the box at FutureSummits
imec Magazine - AI special May 2019 -
Affordable AI in the box at FutureSummits
DSP Valley - Newsletter May 2019 -
Recommendation: Policy Agenda for Artificial Intelligence in Flanders (in Dutch, with executive summary in English on page 15)
Flemish Advisory Council for Innovation & Enterprise (VARIO) - Ramses Valvekens contributed as expert
November 2018
about VARIO
VARIO topics -
Recommendation: Flanders's Space - a Strategy for the Space Economy in Flanders (in Dutch, with executive summary in English on page 5)
Flemish Advisory Council for Innovation & Enterprise (VARIO) - Ramses Valvekens served as member of the VARIO - space research work group
February 2018
about VARIO
VARIO topics -
Feasibility study and proposal for a VHDL coding style
Authors: E2S Software Engineering
In 1993/1994, easics studied whether VHDL can be used to describe and simulate DSP (digital signal processing) systems at the behavioral level, as part of a general evaluation of VHDL. (page 43 - numbered page 35) -
IWT Project on radiation-hardened FPGA and digital ASIC design and cryogene temperature operation
Author: A. Fernandez-Leon, TEC-EDM
ESA presentation about FPGA and ASIC design last slide -
ASIC design launched for Euro Space Missions
Author: AnneFrançoise Pele
EE Times 16 November 2012 -
Datapath Modeling Approach in CMOSIS Camera-chip for the new 'Leica M' camera (pages 1-3)
DSP Valley 13th year - newsletter 6 pages 1-3 -
ESA contract for the Development of a Prototype ASIC for Large Format NIR/SWIR Detector Array (pages 6-8)
DSP Valley 13th year - newsletter 6 pages 6-8 -
Press release ESA contract signed for development of a prototype ASIC
Author: Leuven.Inc - Leuven Mindgate -
DARE User Day
ESA/ESTEC Noordwijk, The Netherlands 8 December 2014 -
Cryogenic and radiation hard ASIC design for large format NIR/SWIR detector array
SPIE, 22-25 September 2014 -
easics is an active member of the VARIO Werkgroep Ruimtevaart
Vlaamse Adviesraad voor Innoveren en Ondernemen (Vlaamse Overheid)
Ilse de Moffarts
- Design of a 150 mV Supply, 2 MIPS, 90nm CMOS, Ultra-Low-Power Microprocessor
Authors: Pieter Weckx, Nele Reynders, Ilse de Moffarts, Wim Dehaene
Lecture Notes in Computer Science, vol 7606. Springer, Berlin, Heidelberg (Online ISBN 978-3-642-36157-9_18)
Inge Doms
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Power Management Circuits for Micropower Generators
Author: Doms, I.
PhD-thesis KULeuven-IMEC; Maart 2009 -
Capacitive Power Management Circuit for Micropower Thermoelectric Generators With a 1.4 A Controller
Authors: Doms, I., Merken, P., Van Hoof, C., Mertens, R.P.
IEEE Journal of Solid-State Circuits; Volume 44, Issue 10, Oct. 2009 Page(s):2824 – 2833, Digital Object Identifier 10.1109/JSSC.2009.2027546 -
Integrated capacitive power-management circuit for thermal harvesters with output power 10 to 1000µW
Authors: Inge Doms, Patrick Merken, Robert Mertens, Chris Van Hoof
International Solid State Circuits Conference 2009 (ISSCC2009) - Capacitive Power Management Circuit for Micropower Thermoelectric Generators with a 2.1 µW Controller
Authors: Inge Doms, Patrick Merken, Robert Mertens, Chris Van Hoof
International Solid State Circuits Conference 2008 (ISSCC2008)
- Comparison of DC-DC-converter architectures of power management circuits for thermoelectric generators
Authors: Inge Doms, Patrick Merken, Chris Van Hoof
European Conference on Power Electronics and Applications 2007 (EPE2007)
Ramses Valvekens
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Cryogenic and radiation-hard asic for interfacing large format NIR/SWIR detector arrays
Authors: Benoit Dupont, Bart Dierickx, Pen Gao, Eric Müller, Geert Verbruggen, Stijn Gielis, Ramses Valvekens
Conference paper 2017 -
Cryogenic and radiation hard ASIC design for large format NIR/SWIR detector
Authors: Peng Gao, Benoit Dupont, Bart Dierickx, Ramses Valvekens, Eric Müller, Geert Verbruggen, Stijn Gielis
Proceedings of SPIE - The International Society for OPtical Engineering 2014 -
Development of signal acquisition Prototype ASIC for large format NIR/SWIR Detector Array
Authors: Benoit Dupont, Pen Gao, Bart Dierickx, Geert Verbruggen, Stijn Gielis, Ramses Valvekens
Conference CMOS Detector Workshop at Toulouse (France) 2013 -
Driving, conditioning and signal acquisition Prototype ASIC for Large Format NIR/SWIR Detector Array
Authors: Benoit Dupont, Pen Gao, Bart Dierickx, Geert Verbruggen, Stijn Gielis, Ramses Valvekens
Conference Scientific detector workshop at Firenze (Italy) 2013 -
De finish van Moores marathon
Author: Ramses Valvekens, Bart Dierickx
Publication Bits & Chips issue 10/2011
Location
easics is situated just on the outer ring of the centre of Leuven, at a 5′ walk from bus- and train station. Situated in a sustainable and energy-efficient office building with an E-level of <50, this contributes to the objectives of Climate Neutral Leuven (KNL 2030). The City of Leuven wants to achieve a net-zero CO2 emission by 2030 by means of living, moving and working differently. This office building already helps to take a big step in the right direction as far as accommodation is concerned: soil energy storage, heat pumps, climate ceilings, triple glazing in well-dimensioned smaller windows, automatic sun blinds, thorough insulation and green roofs. These green roofs provide heat and water absorption.
We try to motivate our personnel by giving them the opportunity to choose an e-bike as part of their end-of-the-year bonus. We motivate them in taking the bike whenever they can. People can also enjoy nature during breaks by taking a walk, a bike ride or a jogging exercise. The building offers bicycling storage, showers and a cloakroom.
We sort packaging waste as much as possible and try to avoid unnecessary printing.