About us
Vision
Our goal in life
Mission
Easics wants to be a market leader in the embedded systems digital design by providing unique competence and development platforms that lead to first-time right, reliable and optimized logic and software that is maintainable by the customer. Our main target market is to support leading OEMs and semiconductor companies with custom designs and customizable IP blocks for these smart embedded processing systems that can be realized in both FPGAs and ASICs.
Start-up fun in a rock-solid company
happy colleagues and counting!
Management
Ramses Valvekens is the Managing Director of easics, since the management buy-out in December 2004.
Besides his role as Managing Director, Ramses remains active as a systems architect, focusing on technology selection, project risk reduction and cost-effective mixed-signal ASIC and FPGA design trade-offs. He is a regular speaker at industry conferences and gives lectures in semiconductor system design.
He holds a Master degree (1997) in Electronics Engineering from the Katholieke Universiteit Leuven and a Master degree (1994) in industrial engineering / electronics from Groep T in Leuven, Belgium.
He performed research in signal processing at the Lawrence Livermore National Laboratories (California, USA) and at the Institut National Polytechnique de Grenoble (France).
In 1994, he won the Barco/VIK prize for the design of an FPGA-based reconfigurable processor for industrial image processing in cooperation with imec.
He has been working at easics since 1997. During the TranSwitch years (2000 till 2004), he was technical manager of a product family of mixed-signal telecom chips. He received the TranSwitch Employee Recognition Award in 2003 and is co-inventor of two telecommunication patents[1][2].
Steven Coenen is the Managing Director of easics, since the management buy-out in December 2004.
He holds a Master degree (1998) in Computer Engineering from the Katholieke Universiteit Leuven, Belgium.
He has been working at easics since 1998 and has developed most of the easics in-house EDA tools to support easics’ design methodology.
He is an all-round hardware/software guru and a vivid GNU/Linux adept.
He is the inventor of a patent[3] on the verification of telecom protocols.
Chairmain of the Board
Professor André Oosterlinck is Honorary Rector of the Katholieke Universiteit Leuven (KU Leuven) and chairman of the Association KU Leuven, which is Belgium’s largest university. In 1984 he was appointed full professor at KU Leuven in the domain of image and signal processing. From 1984 to 1994 he was director of the division Electronics Systems Automatization and Technology (ESAT). He became vice-president for the exact sciences at KU Leuven in 1990 and was rector and president of the KU Leuven from August 1995 until July 2005. He has also been visiting professor at Utah University (1984) and ARC-IBM, San Jose, USA (1986-1996). He was a co-founder of ICOS Vision Systems (now KLA Tencor). He currently is the vice-chairman of imec and board member or chairman at several high-tech companies.
The other board members are Ramses Valvekens and Steven Coenen. easics is a privately owned company.
Publications
easics
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Affordable AI in the box at FutureSummits
imec Magazine - AI special May 2019 -
Affordable AI in the box at FutureSummits
DSP Valley - Newsletter May 2019 -
Recommendation: Policy Agenda for Artificial Intelligence in Flanders (in Dutch, with executive summary in English on page 15)
Flemish Advisory Council for Innovation & Enterprise (VARIO) - Ramses Valvekens contributed as expert
November 2018
about VARIO
VARIO topics -
Recommendation: Flanders's Space - a Strategy for the Space Economy in Flanders (in Dutch, with executive summary in English on page 5)
Flemish Advisory Council for Innovation & Enterprise (VARIO) - Ramses Valvekens served as member of the VARIO - space research work group
February 2018
about VARIO
VARIO topics -
Feasibility study and proposal for a VHDL coding style
Authors: E2S Software Engineering
In 1993/1994, easics studied whether VHDL can be used to describe and simulate DSP (digital signal processing) systems at the behavioral level, as part of a general evaluation of VHDL. (page 43 - numbered page 35) -
IWT Project on radiation-hardened FPGA and digital ASIC design and cryogene temperature operation
Author: A. Fernandez-Leon, TEC-EDM
ESA presentation about FPGA and ASIC design last slide -
ASIC design launched for Euro Space Missions
Author: AnneFrançoise Pele
EE Times 16 November 2012 -
Datapath Modeling Approach in CMOSIS Camera-chip for the new 'Leica M' camera (pages 1-3)
DSP Valley 13th year - newsletter 6 pages 1-3 -
ESA contract for the Development of a Prototype ASIC for Large Format NIR/SWIR Detector Array (pages 6-8)
DSP Valley 13th year - newsletter 6 pages 6-8 -
Press release ESA contract signed for development of a prototype ASIC
Author: Leuven.Inc - Leuven Mindgate -
DARE User Day
ESA/ESTEC Noordwijk, The Netherlands 8 December 2014 -
Cryogenic and radiation hard ASIC design for large format NIR/SWIR detector array
SPIE, 22-25 September 2014 -
easics is an active member of the VARIO Werkgroep Ruimtevaart
Vlaamse Adviesraad voor Innoveren en Ondernemen (Vlaamse Overheid)
Ilse de Moffarts
- Design of a 150 mV Supply, 2 MIPS, 90nm CMOS, Ultra-Low-Power Microprocessor
Authors: Pieter Weckx, Nele Reynders, Ilse de Moffarts, Wim Dehaene
Lecture Notes in Computer Science, vol 7606. Springer, Berlin, Heidelberg (Online ISBN 978-3-642-36157-9_18)
Inge Doms
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Power Management Circuits for Micropower Generators
Author: Doms, I.
PhD-thesis KULeuven-IMEC; Maart 2009 -
Capacitive Power Management Circuit for Micropower Thermoelectric Generators With a 1.4 A Controller
Authors: Doms, I., Merken, P., Van Hoof, C., Mertens, R.P.
IEEE Journal of Solid-State Circuits; Volume 44, Issue 10, Oct. 2009 Page(s):2824 – 2833, Digital Object Identifier 10.1109/JSSC.2009.2027546 -
Integrated capacitive power-management circuit for thermal harvesters with output power 10 to 1000µW
Authors: Inge Doms, Patrick Merken, Robert Mertens, Chris Van Hoof
International Solid State Circuits Conference 2009 (ISSCC2009) - Capacitive Power Management Circuit for Micropower Thermoelectric Generators with a 2.1 µW Controller
Authors: Inge Doms, Patrick Merken, Robert Mertens, Chris Van Hoof
International Solid State Circuits Conference 2008 (ISSCC2008)
- Comparison of DC-DC-converter architectures of power management circuits for thermoelectric generators
Authors: Inge Doms, Patrick Merken, Chris Van Hoof
European Conference on Power Electronics and Applications 2007 (EPE2007)
Ramses Valvekens
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Cryogenic and radiation-hard asic for interfacing large format NIR/SWIR detector arrays
Authors: Benoit Dupont, Bart Dierickx, Pen Gao, Eric Müller, Geert Verbruggen, Stijn Gielis, Ramses Valvekens
Conference paper 2017 -
Cryogenic and radiation hard ASIC design for large format NIR/SWIR detector
Authors: Peng Gao, Benoit Dupont, Bart Dierickx, Ramses Valvekens, Eric Müller, Geert Verbruggen, Stijn Gielis
Proceedings of SPIE - The International Society for OPtical Engineering 2014 -
Development of signal acquisition Prototype ASIC for large format NIR/SWIR Detector Array
Authors: Benoit Dupont, Pen Gao, Bart Dierickx, Geert Verbruggen, Stijn Gielis, Ramses Valvekens
Conference CMOS Detector Workshop at Toulouse (France) 2013 -
Driving, conditioning and signal acquisition Prototype ASIC for Large Format NIR/SWIR Detector Array
Authors: Benoit Dupont, Pen Gao, Bart Dierickx, Geert Verbruggen, Stijn Gielis, Ramses Valvekens
Conference Scientific detector workshop at Firenze (Italy) 2013 -
De finish van Moores marathon
Author: Ramses Valvekens, Bart Dierickx
Publication Bits & Chips issue 10/2011
Anthony Van Herrewege
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LiBrA-CAN: Lightweight Broadcast Authentication for Controller Area Networks.
Authors: B. Groza, S. Murvay, A. Van Herrewege and I. Verbauwhede
ACM Transactions on Embedded Computing Systems 16(3), pp. 90:02-90:28, 2017 -
Circuit challenges from cryptography
Authors: I. Verbauwhede, J. Balasch, S. Sinha Roy and A. Van Herrewege
In International Solid-State Circuits Conference, IEEE, pp. 428-429, 2015 -
Lightweight PUF-based Key and Random Number Generation
Author : A. Van Herrewege
PhD thesis, KU Leuven, I. Verbauwhede (promotor), 202 pages, 2015 -
Chaskey: An Efficient MAC Algorithm for 32-bit Microcontrollers
Authors: N. Mouha, B. Mennink, A. Van Herrewege, D. Watanabe, B. Preneel and I. Verbauwhede
In Selected Areas in Cryptography, 21st Annual International Workshop, SAC 2014, Lecture Notes in Computer Science 8781, A. Joux and A. M. Youssef (eds.), Springer-Verlag. pp. 306-323, 2014 -
Software Only, Extremely Compact, Keccak-based Secure PRNG on ARM Cortex-M
Authors: A. Van Herrewege, and I. Verbauwhede
In 51st Design Automation Conference (DAC 2014), IEEE, 6 pages, 2014 -
Ultra Low-Power implementation of ECC on the ARM Cortex-M0+
Authors: R. De Clercq, L. Uhsadel, A. Van Herrewege and I. Verbauwhede
In 51st Design Automation Conference (DAC 2014), IEEE, 6 pages, 2014 -
Secure PRNG Seeding on Commercial Off-the-Shelf Microcontrollers
Authors: A. Van Herrewege, S. Katzenbeisser, V. Van der Leest and I. Verbauwhede
In Trustworthy Embedded Devices, Conference Publishing Services IEEE, pp. 55-64, 2013 -
Sancus: Low-cost trustworthy extensible networked devices with a zero-software Trusted Computing Base
Authors: J. Noorman, P. Agten, W. Daniels, C. Huygens, F. Piessens, B. Preneel, R. Strackx, A. Van Herrewege and I. Verbauwhede
In 22nd USENIX Security Symposium 2013, Usenix, pp. 479-494, 2013 -
LiBrA-CAN: a Lightweight Broadcast Authentication protocol for Controller Area Networks
Authors: B. Groza, S. Murvay, A. Van Herrewege and I. Verbauwhede
In th International Conference on Cryptology and Network Security, CANS 2012, Lecture Notes in Computer Science 9476, M. Manulis, J. Pieprzyk and A. Sadeghi (ads.), Springer-Verlag, pp. 185-200, 2012 -
Tiny, Application-Specific, Programmable Processor for BCH Decoding
Authors: A. Van Herrewege and I. Verbauwhede
In International Symposium on System-on-Chip 2012, IEEE Computer Society, 5 pages, 2012 -
PUFKY: A Fully Functional PUF-based Cryptographic Key Generator
Authors: R. Maes, A. Van Herrewege and I. Verbauwhede
In Cryptographic Hardware and Embedded Systems - CHES 2012, Lecture Notes in Computer Science 7428, E. Prouff, and P. Schaumont (eds.), Springer-Verlag, pp. 302-319, 2012 -
Reverse Fuzzy Extractors: Enabling Lightweight Mutual Authentication for PUF-enabled RFIDs
Authors: R. Maes, R. Peeters, A. Van Herrewege, C. Wachsmann, S. Katzenbeisser, A. Sadeghi, and I. Verbauwhede
In Financial Cryptography and Data Security - 16th International Conference, FC 2012, Lecture Notes in Computer Science 7397, A. D. Keromytis (ed.), Springer-Verlag, pp. 374-389, 2012 -
CANAuth - A Simple, Backward Compatible Broadcast Authentication Protocol for CAN bus
Authors: A. Van Herrewege and I. Verbauwhede
In ECRYPT Workshop on Lightweight Cryptography 2011, pp. 229-235, 2011 -
CANAuth - A Simple, Backward Compatible Broadcast Authentication Protocol for CAN bus
Authors; A. Van Herrewege, D. Singelée and I. Verbauwhede
In Embedded Security in Cars 9th, 7 pages, 2011 -
Enabling Hardware Performance Counters on the ARM Cortex-A8
Author: A. Van Herrewege
COSIC internal report, 11 pages, 2010 -
Compact Implementations of Pairings
Author: A. Van Herrewege
WiSSec 2009, Louvain-La-Neuve, BE, 2009 -
Compacte implementaties van paringen
Author: A. Van Herrewege
Master thesis, Katholieke Universiteit Leuven, B. Preneel and I. Verbauwhede (promotors), 74 pages, 2009 -
Breaking ECC2K-130
Authors: D. V. Bailey, L. Batina, D. J. Bernstein, P. Birkner, J. W. Bos, H. Chen, C. Cheng, G. De Meulenaer, L. J. Dominguez Perez, J. Fan, T. Guneysu, F. Gurkaynak, T. Kleinjung, T. Lange, N. Mentens, R. Niederhagen, C. Paar, F. Regazzoni, P. Schwabe, L. Uhsadel, G. Van Damme, A. Van Herrewege and B. Yang
IACR Cryptology ePrint Archive 2009(541), 20 pages, 2009
Location


easics is situated in ‘Arenberg Sciencepark’, in a very green environment, adjacent to part of Heverlee forest. Thanks to the maximum isolation of the buildings by among other the use of high-efficiency glass, the energy needs can be kept to the minimum. The use of passive solar energy, also called ‘building on the sun’, make the heating invoices lighter. The chosen orientation makes the buildings very energy-efficient. Through permanent sun protection on the south side, the warming stays minimized in summer. The building has a concrete core activation for cooling and heating. The rainwater is used for the sanitary.
The surroundings of the building are still under construction but will, in future, have plenty of green zones.
We try to motivate our personnel by giving them the opportunity to choose an e-bike as part of their end-of-the-year bonus. We motivate them in taking the bike whenever they can. People can also enjoy nature during breaks by taking a walk, a bike ride or a jogging exercise. The building offers bicycling storage, showers and a cloakroom.
We sort packaging waste as much as possible and try to avoid unnecessary printing.