How to start with AI close to the sensor and deploy AI on FPGA
You are defining your edge AI use case based on an available dataset. Now is the right time to contact easics, together we will deploy your AI application close to the sensor . Either the customer is providing a trained AI model or we can help you with labeling, network selection and training to create a trained model. This model and the constraints of your application like speed, latency, power consumption and cost defines the right FPGA platform as inference engine. The easics framework will convert the model and the weights into an FPGA build file that is ready to deploy on the chosen FPGA hardware.
Deep learning Framework
Easics' deep learning framework can support different neural networks based on existing frameworks like Tensorflow, Caffé, Keras, python, C/C++, … The input for the framework is the network description and the weights of the trained deep learning model. The network description is converted (if necessary) to C++ and used to build the sequencer. The weights of the trained model are converted (floating point quantization) in an fixed point image. Via an API the sequencer and the image are uploaded and stored on the SDRAM connected to the FPGA.
The classification result (what & where it is) of the deep learning algorithm will be sent to the application where the detection of the result will be applied. We can supply a complete system design around the Deep learning core including camera interfaces or external interfaces. A standard solution can combine our TCP Offload Engine with the deep learning core.
Deep learning on FPGA
Benefits of FPGA technology
Using FPGA technologies has the following advantages:
FPGAs have product lifecycles of 15 years.
High performance per Watt and low latency make it suitable for real-time embedded applications.
The FPGA logic can be shaped to match any network architecture.
Performance, cost and power will define the FPGA of choice.
Future proof and scalable solution as the FPGA architecture can be re-configured for future neural networks.
Easics' framework offers a flexible approach to program the FPGA and a fast-time to market.
The deep learning core can be easily integrated with other CPU’s, vision functionality and connectivity.
We can provide you an ARIA 10 SoM development kit. The input and output interface is ethernet. We can provide this with the DNN of your choice e.g. Yolo V2 or V3, Resnet, mobilenet, tinyyolo, ...