VCI Compiler - DATASHEET

1.

Short Description

VCI Compiler is a highly efficient design productivity tool.

The tool generates both a hardware view (synthesizable VHDL) and a software view (C) of the interface to a generic bus protocol.

The VCI bus protocol is independent of the actual physical on-chip bus structure. A "bus adaptor" is needed to translate the generic VCI bus protocol to the specific on-chip bus.

Multiple Virtual Components (VCs) can be connected to the VCI bus.

The user needs to define the variables, shared between hardware and software, in a VCI Data Model.

The generated VHDL code and C code constitute an interface between the hardware modules (the Virtual Components or VCs) and the software running on a microprocessor (either an external microprocessor or an on-chip core).

The resulting code translates read and write accesses to the VCI bus into an access in hardware.

2.

Key Benefits

• Guaranteed compatibility between hardware and software

  The generated VHDL code and C code are guaranteed compatible. This interface is correct by construction, since it is generated from the same description of the variables, shared in the interface between hardware and software.

• Optimal address coding

  VCI Compiler assigns the addresses of the variables, using an address coding algorithm, that results in an optimal hardware decoder. The user can define the VCI base address.

• Generation of synthesizable VHDL code

• Generation of an HTML formatted address map

  VCI Compiler generates a graphical view (HTML) of the VCI Data Model. This view can serve as documentation of the design.

• Concurrent hardware / software development

  The generated C header files can be used by the software team to start writing code in a very early stage of the project.

• Named access to variables minimizes the impact of changes

  The generated VHDL packages and C header files allow the designer to write his functional VHDL code (the logic of the Virtual Component) or his API software using "named" access. This approach hides the implementation details about the HW/SW interface. E.g. the designer doesn't need to know at which address and at which bit positions in the data word the variable is accessible.

• Hardware and software IP reuse

  Furthermore, named access to variables enhances the reuse of both hardware IP and software IP.

3.

VCI Compiler Output Files

• Synthesizable VHDL code

  VCI Compiler generates the following files with synthesizable VHDL code:

  • PCK_VCI.vhd:   this package contains some definitions of general constants and general functions, that can be used in all VHDL files, generated by VCI Compiler.

  • PCK_VCI_[VC].vhd:   VCI Compiler generates for each Virtual Component (VC) that is defined in the Data Model, a VHDL package, that contains all VC specific types, constants, functions and procedures.

  • VCI_[VC]_ENT.vhd and VCI_[VC]_RTL.vhd:   these files contain the entity description and the RTL architecture of the interface module for each VC. The RTL architecture performs the address decoding and the access to the shared variables of that VC, using access functions from PCK_VCI_[VC].vhd.

  
  

• C code

  VCI Compiler generates the following files with C code:

  • VCI_[VC].h:   these C header file contain all VC specific C constants, macros and functions.

  
  

• HTML Memory Map

  VCI Compiler generates the following file with the HTML Memory Map:

  • VCI_MemoryMap.html:   this file contains an HTML description of the memory address map, based upon the VCI Data Model.