Permanently looking for colleagues to ride the digital wave

You're into algorithms and signal processing? Perfect! You're a big-picture person whose world extends far beyond voltages, currents and charges? Even better! You have or are about to get a Master of Science or PhD degree in Electronics Engineering, Computer Science/Engineering, Applied Mathematics, or similar? Terrific! Read on! And do contact us for a visit.

We make the world a smarter place

Easics is the reference in smart electronic systems design. Our customers are world-leading companies. They give us interesting and rewarding challenges for first-of-a-kind applications. Take for example: a blindingly fast vision-based food sorting line, a radiation-hardened camera for earth observation satellites, top-notch cochlear implants helping hearing-impaired newborns and grandmas alike, intelligent power-harvesting wireless tags for airborne components, ...

We invent the algorithms (i.e., the 'smart' in smart systems). We model such challenges in software, and go through successive layers of abstraction. Trade-offs in performance, power consumption and area, to name a few, are made along the road, resulting in the physical realization: an FPGA, a System-on-Chip or a custom-tailored ASIC. This chip will be at the heart of our customer's products. And we often embed one or more processors, running our software, e.g., on GNU/Linux.

You may have heard of the Internet of Everything. A buzzword, for sure. But underlying is a booming business where more and more products are made intelligent and miniaturized on chip. For Easics, that means a solid business outlook and many exciting projects to look forward to.

We'll make you an expert, no worries

Whether you are an eager starter having just obtained your Master's degree or a seasoned professional, we'll guide you through our design methodology and let you indulge in our vast body of expertise. Easics is known to be a 'learning' company, a company that will give you the chance and time to become an expert. You will join the Easics Academy from day one: we share knowledge and ideas on a regular basis in Easics seminars.

You'll get the chance to work on projects in very diverse domains. Making high-level models, delving into the intricacies of timing and parallelism, running tests in our lab or discussing requirements and architecture with the customer. Our people work in teams with high autonomy, and they are always ready to help each other out.

One more thing! We'll assign you a mentor. You may ask her/him any question, really!

Start-up fun in a rock-solid company

We like to see ourselves as a start-up company. A company where initiative and inspiration are valued, and a ridiculously cool place to work. A company also with an open door policy, where you collaborate with colleagues on an equal basis. But be assured: behind that is a rock-solid independent company, with strong financials and a persistently bright outlook. We're in it for the long run, and we hope you'll be too.

Our offices are located in Leuven - Heverlee, on the Arenberg Science Park: one of the high-tech hotspots of Flanders. We're on a green campus, next to the Meerdaal forest (great for walking or jogging during lunch breaks!), and the University of Leuven science and engineering campus. We are just a minute away from the Leuven exit on the E314 highway. There is a bus stop is front of our offices, with regular connections to the Leuven railway station.

Easics is a spin-off company from KU Leuven - ESAT (PSI - VISICS) and imec.

If you'd rather read the tech-words

You'll design FPGA and ASIC-based embedded systems in the fields of industrial machinery, medical equipment, imaging systems and intelligent cameras, wireless and high-speed communications, aerospace, digital signal processing and ultra-low power design.

Your focus will be on algorithm/system design, FPGA and digital ASIC design, and embedded software. We design chips in state-of-the-art FPGA technology as well as in a variety of ASIC technologies ranging all the way from 0.18 micron till 28 nanometer.

You will work in software environments using languages such as SystemC, C++, VHDL, (System)Verilog, MATLAB, Python and Ruby. You will use open-source software such as GNU/Linux, gcc, git and RedMine.

In addition to our own, home-brewn EDA tools, you'll get the chance to work with industry-leading EDA tools from Mentor Graphics, Synopsys, Cadence, Altera, Xilinx, Microsemi and MathWorks.

We can't wait to see you join our growing team

Easics currently has the following open positions:

  • Design Engineers (FPGA, ASIC, embedded software) aka Smart Systems design engineers

  • Senior Design Engineers (FPGA, ASIC, embedded software) aka Senior Smart Systems design engineers

  • Engineering Job Students and Interns

Sending in your application is a step closer to your best career move ever.

Design Engineer (FPGA, ASIC, embedded software)

Whether this is your first application, or you've already had a first job experience, we'll give you an extensive training, and a growing responsibility for a wide variety of projects.

We expect that:

  • you're a team player.

  • your're an analytic problem solver.

  • you're creative and eager to learn.

  • you have a keen interest in digital embedded systems and software methodology.

  • you have a Master of Science or PhD degree in Electronics Engineering (Embedded Systems and Multimedia, or Electronics and Integrated Circuits), Computer Science/Engineering, Applied Mathematics, or similar from an internationally reputed university.

  • you're fluent in English.

  • you have a working knowledge of Dutch, since the language at the office is Dutch.

It's a plus if:

  • you have some programming experience. E.g., in a university project, a contribution to an open-source project, as a hobby, etc. Show us your project on github!

  • you're fluent in Dutch.

You'll soon come into contact with:

  • FPGA and digital ASIC design and verification

  • (embedded) software design

  • modeling and verification of large digital systems

  • C++, SystemC, VHDL, (System)Verilog, MATLAB, GNU/Linux

You will work at the Easics offices located at the Arenberg Science Park (Leuven - Heverlee, Belgium).

You will have regular meetings at customer locations in Belgium and sporadically in other (mostly European) countries.

Easics is an equal opportunity employer. We value and recognize your talent with an attractive remuneration package.

Senior Design Engineer (FPGA, ASIC, embedded software)

Contact us for more info.

Summerjob 1: Don't document the design; design the document.

One could implement a state-of-the-art, super intelligent HW/SW design, but without any good documentation, it's only a matter of time before it loses all value.

"Ink is better than the best memory" as the Chinese say.

At Easics, we completely agree, but our philosophy also relies greatly upon efficient software techniques and revision control. We have our own software tools that automatically generate textual documentation output for e.g. register maps and test results. Using Git allows us to track their changes and compare different revisions. This method works perfectly for plain text files, which are the input of a document generator such as LaTeX, AsciiDoc, Markdown, …

However, nowadays the default file format used by Microsoft Word (.docx) has become a widespread de facto standard for office documents.

Our idea for this summer job is to write a software tool that converts plain text input (along with the included images) to Microsoft Word output, most possibly making use of Pandoc and/or Visual Basic.

Experience with a programming language such as Python, Ruby, C++, … is required and some knowledge of Visual Basic is definitely a plus.

If all this interests you, please send your résumé and availability to

Application deadline is 1st April 2016.

Summerjob 2: Relentless tester wanted.

Easics is a smart-electronic-system design company, targeting both ASIC- and FPGA-based embedded systems. One of the things that makes us stand out is our design methodology. We use software techniques as much as possible to design our hardware. Our own tools automatically write out VHDL toplevels, configurations and register maps and support hardware/software co-design and fully automated verification.

In general, a concise software language description is rolled out to the more verbose hardware language needed for synthesis and the further digital back-end.

This greatly enhances our efficiency and avoids smart engineers to be frustrated with dumb (copy-paste) work. As a part of our methodology framework, we are currently developing an ever more powerful VHDL parser that can understand and analyze VHDL.

Your job will be to contribute to this internal project, starting with grilling our parser until all possible VHDL cases are covered. From there on, further development of the parser can hopefully make our wildest dreams come true!

Basic knowledge of VHDL is required, but during the project you will definitely gain more expertise by digging in to it to the bottom.

If all this interests you, please send your résumé and availability to

Application deadline is 1st April 2016.

Summerjob 3: Motion-based digital whiteboard

In order to design and implement our smart and complex digital systems, we very often make use of block diagrams, decision trees, FSMs, protocol layer stacks and so on. The first version of a system is typically designed during a meeting.

Back in the day, one would have used a whiteboard and some colorful markers for this. Nowadays, huge smart TVs take up so much room, that there is no space left for a whiteboard.

We find ourselves in this predicament and are thus in desperate need of a bright summer student to come to the rescue!

The idea is to make a software program that makes use of a WiiMote and an infrared light pen to transform a smart TV into a digital whiteboard. With this solution we also won't have to take a blurry photo of the whiteboard at the end of the meeting. Two birds with one stone!

Strong C++ or Python knowledge required.

If all this interests you, please send your résumé and availability to

Application deadline is 1st April 2016.

Contact us for more info.